- The JSR-133 Cookbook for Compiler Writers
- Relaxed-Memory Concurrency
- JLS: Happens-before Order
- Mechanical sympathy: memory barriers/fences
- Mechanical sympathy: write combining
- Drilling down into the Xeon Skylake architecture
- Hyper-threading
- SMT - Simultaneous multithreading
- volatile memory
- SRAM - Static random access memory
- DRAM - Dynamic random access memory
- Memory model
- Shared memory
- Memory barrier
- Numa
- cache coherence
- NUMA: An Overview
- The 2016 NUMA Deep Dive Series
- How to confirm NUMA
- CPU Cache and why you care
- Why software developers should care about CPU caches